Temperature compensated R-C oscillator

ABSTRACT

An R-C oscillator ( 200 ) is configured to vary the two voltage levels that are used to control the oscillation, such that the variation in oscillation frequency with temperature is minimized. A first resistor (R 1 ) is used to control one of the voltage levels, and a second resistor (R 2 ) having a temperature coefficient that differs from the temperature coefficient of the first transistor is used to control the other voltage level. The first resistor (R 1 ) also controls the current used to charge and discharge the capacitor (C) used to effect the oscillation. By the appropriate choice of resistance values, the variations of the control voltages and current are such that the time to charge and discharge the capacitor (C) between the control voltages remains substantially constant with temperature. Preferably the resistance values are selected to also compensate for temperature variations in the delay of the feedback loop.

CROSS REFERENCE TO RELATED APPLICATION

This application claims the benefit of U.S. provisional application Ser.No. 60/434,113 filed Dec. 17, 2002, which is incorporated herein byreference.

This invention relates to the field of electronic circuit design, and inparticular to a temperature compensated oscillator

Conventional R-C (resistor-capacitor) oscillators operate bysystematically charging and discharging a capacitor via a current thatis controlled by a resistor. The voltage across the oscillator is fedback to a switching device that alternately charges and discharges thecapacitor. When the voltage on the capacitor reaches an upper limit, theswitching device initiates a discharge of the capacitor; when thevoltage on the capacitor reaches a lower limit, the switching deviceinitiates a charge of the capacitor. The rate of charge and discharge toand from the capacitor that produces the voltage swing between the upperand lower voltage limits is controlled by the current flow through aresistor.

FIG. 1 illustrates an example prior art circuit diagram of aconventional R-C oscillator 100. A first stage includes a resistor Rthat controls current flow through a pair of diode-configuredtransistors 150 a, 150 b. The voltages at opposing nodes of the resistorprovide a pair of voltage levels that are used to control thealternating charge and discharge of a capacitor C.

A switching stage includes a pair of comparators 110, 120, a bistabledevice 130, a switch 170, and a pair of transistors 150 b, 160 b thatprovide the charge or discharge currents to the capacitor C, as detailedbelow.

Assume, initially, that the switch 170 is configured to couple thecapacitor C to the charging transistor 150 b, corresponding to a logic“0” at the Q-output of the bistable device 130. The comparator 110compares the voltage on the capacitor C to the voltage level at theupper node of the resistor R. When the voltage level on the capacitor Cincreases to the voltage level at the upper node of resistor R, thebistable device 130 is reset, thereby asserting a logic “1” at theQ-output, which switches the coupling of the capacitor C to thedischarging transistor 160 b. Thereafter, when the voltage level on thecapacitor C decreases below the voltage level at the lower node ofresistor R, the comparator 120 asserts a set signal to the bistabledevice 130. The set signal produces a logic “0” at the Q-output, therebyswitching the coupling of the capacitor C back to the chargingtransistor 150 b.

When neither the set nor reset of the bistable device 130 is asserted,the bistable device 130 retains its prior output state. Thus, once theswitch 170 is controlled to couple the capacitor to the particularcharge/discharge transistor 150 b/160 b, the charging/dischargingcontinues until the next reset/set signal is asserted. In this manner,the switching stage alternately charges and discharges the capacitor Cbetween the first and second voltage levels on the upper and lower nodesof the resistor R, respectively. The rate of change of the voltage onthe capacitor between the first and second voltage levels is controlledby the value of the resistor R, because the transistor pairs 150 b, 160b are configured as current mirrors with the transistor pairs 150 a, 160a.

Because the same current, I, is provided to charge and discharge thecapacitor C, the oscillation will be symmetric, and the half-cycle timecan be expressed as:T _(1/2)=((V _(h) −V _(l))*C)/I,  (1)where V_(h) is the upper limit voltage of the node of the resistor R atthe comparator 110, and V_(l) is the lower limit voltage of the node ofthe resistor R at the comparator 120. However,(V _(h) −V _(l))=R*I,  (2)and thus T _(1/2) =R*C.  (3)

The operation of the prior art R-C oscillator 100 of FIG. 1 isparticularly sensitive to temperature variations that affect the valueof the resistor R. Although the value of the capacitor C is fairlyconstant with temperature, the value of the resistor R variessignificantly with temperature. Assuming a typically positivetemperature coefficient, as the operating temperature increases, theresistance of the resistor R increases, thereby increasing thehalf-cycle time, T_(1/2), in equation (3), above. In most semiconductorprocesses, the temperature coefficients of all resistors are of the samesign, and thus it is generally not possible to employ anegative-coefficient resistor to counter the temperature-varying effectsof a positive-coefficient resistor, and vice versa.

Further compounding the problem, there is an inherent delay in thefeedback loop of the switching stage, and this delay also increases withtemperature, further decreasing the oscillation frequency of theoscillator 100.

It is an object of this invention to provide an R-C oscillator withreduced temperature dependency. It is another object of this inventionto provide an R-C oscillator with reduced temperature dependency in aCMOS-compatible form.

These objects, and others, are achieved by an R-C oscillator that isconfigured to vary the two voltage levels that are used to control theoscillation, such that the variation in oscillation frequency withtemperature is minimized. A first resistor is used to control one of thevoltage levels, and a second resistor having a temperature coefficientthat differs from the temperature coefficient of the first transistor isused to control the other voltage level. The first resistor alsocontrols the current used to charge and discharge the capacitor used toeffect the oscillation. By the appropriate choice of resistance values,the variations of the control voltages and current are such that thetime to charge and discharge the capacitor between the control voltagesremains substantially constant with temperature. Preferably theresistance values are selected to also compensate for temperaturevariations in the delay of the feedback loop.

FIG. 1 illustrates an example circuit diagram of a prior art R-Coscillator.

FIG. 2 illustrates an example circuit diagram of atemperature-compensated R-C oscillator in accordance with thisinvention.

Throughout the drawings, the same reference numeral refers to the sameelement, or an element that performs substantially the same function.

This invention is based on the observation that in most semiconductorprocesses, although the temperature coefficients of all resistors are ofequal sign, the value of the temperature coefficient of differentresistor-types can differ by an order of magnitude or more, and thisdifference in temperature coefficient can be used to compensate for thetemperature effects of changes in resistance values, as well as othertemperature-dependent effects.

For ease of understanding, the invention is initially presented using azero-delay paradigm, wherein the delay between a voltage change and theresults of the effects of the voltage change is zero.

FIG. 2 illustrates an example circuit diagram of atemperature-compensated R-C oscillator 200 in accordance with thisinvention. The additional components of this example circuit 200,relative to the example circuit 100, are the transistor pair 150 c, 160c and the resistor R2 in series with these transistors 150 c, 160 c.Preferably, each of the N-channel transistors 160 a, 160 b, and 160 care substantially identical, as are the Pchannel transistors 150 a, 150b, and 150 c, although one of ordinary skill in the art will recognizethat different sized transistors could be used, with appropriate changesto the equations below.

The diode-configured Nchannel transistor 160 c is configured similar tothe transistor 160 a, and the Pchannel transistor 150 c is configured asa current mirror to the transistor 150 a, so that equal currents flowthrough resistors R1 and R2, and this is the same value of current, I,that charges and discharges the capacitor C.

Repeating equation (1), for convenience:T _(1/2)=((V _(h) −V _(l))*C)/I.  (1)

In the circuit 200:Vh=I*R1+Vn,  (4)and Vl=I*R2+Vn,  (5)so that Vh−Vl=I*(R1−R2),  (6)and T _(1/2)=(R1−R2)*C.  (7)where Vn is the reference voltage drop across a diode-connect Nchanneltransistor 160 a, 160 c, and R1>R2. To maintain a constant oscillationcycle-time, the value (R1−R2) in this invention is configured to remainsubstantially constant, as detailed below.

As is known in the art, the temperature dependency of resistance withtemperature can be expressed as:R(T)=R(T′)*(1+K*(T−T′)),  (8)where R(T) is the resistance at temperature T, R(T′) is the resistanceat a temperature T′, and K is the temperature coefficient of theresistor R. This invention is based on the observation that, because R1is larger than R2, a substantially constant resistance difference(R_(d)=R1−R2) may be provided by selecting a resistor R2 that has ahigher temperature coefficient than R1. Defining K1 as the temperaturecoefficient of resistor R1 and K2 as the temperature coefficient ofresistor R2, the temperature dependency of the difference term (R1−R2)in equation (7) is given by:R _(d)(T)=R1(T′)*(1+K1*(T−T′))−R2(T′)*(1+K2*(T−T′)),  (9)where R_(d)(T) is the difference resistance (R1−R2) at temperature T.

Because the difference resistance Rd should be constant across alltemperatures, this constant can be defined at R_(d)(T) and R_(d)(T′) as:R _(d) =R _(d)(T)=R _(d)(T′)=R1(T′)−R2(T′).  (10)

Solving equations (9) and (10) for R2(T′) and R1(T′):R2(T′)=Rd*(K1/(K2−K1)),  (11)and R1(T′)=Rd+R2(T′).  (12)

The material with which a resistor is formed generally determines thetemperature coefficient K of the resistor, and the resistance at a giventemperature T′ is generally defined as the nominal resistance value atroom temperature, and is defined by the dimensions of the resistancematerial. Thus, to achieve substantial temperature independence, adesigner selects values of the capacitor C and the difference resistanceRd to achieve the desired oscillator frequency, then selects appropriatematerials such that the temperature coefficient of the material that isused for resistor R2 (K2) is larger than the temperature coefficient ofthe material that is used for resistor R1 (K1), and solves for thenominal resistances of R2 and R1 using equations (11) and (12).

EXAMPLE

Consider the design of a CMOS oscillator having a desired oscillationfrequency of 1 KHz, via the use of a 5 pF capacitor C and a differenceresistance R_(d) of 100,000 ohms. The temperature coefficient of anNwell resistor is known to be higher than the temperature coefficient ofa Ppoly resistor; thus, resistor R2 will be formed as an Nwell resistor,and resistor R1 will be formed as a Ppoly resistor. Using a typicalvalue of K1 of 0.06%/° C. for Ppoly resistors and of K2 of 0.5%/° C. forNwell resistors:R2=100,000*(0.06/(0.50−0.06))=13,636 ohms, andR1=100,000+13,635=113,636 ohms.

In the foregoing, the delay within the feedback loop (from the capacitorC, through the comparators 110, 120, the bistable device 130, and theswitch 170, and back to the capacitor C) is assumed to be zero. If thedelay, D, is not substantially zero, the half-cycle time can beexpressed as:T _(1/2) =D(T)+(R1(T)−R2(T))*C,  (13)where D(T)=D(T′)*(1+K _(d)*(T−T′)).  (14)

Expressing the half-cycle time in terms of an equivalent resistance,R_(eq) times the capacitance:T _(1/2) =R _(eq) *C=(D(T)/C+R1(T)−R2(T))*C,  (15)and, at T′, T _(1/2)=(D(T′)/C+R1(T′)−R2(T′))*C.  (16)

Solving equations 15 and 16 for R1(T′) and R2(T′):R2(T′)=((D(T′)/C)*(K _(d) −K1)+R _(eq) *K1)/(K2−K1),  (17)and R1(T′)=R _(eq) +R2(T′).  (18)

Note that the value of K_(d) is a function of the process parameters,which, in general, exhibit a variance. A nominal value of K_(d) can beused in the above equations 17, 18 to compensate for temperaturevariations under generally typical conditions. If more precisetemperature compensation is desired, one or both of the resistors R1 andR2, are embodied as “trimmable” resistors. When the actual delay D(T′)at the reference temperature T′ (typically, room temperature, 20° C.)and the actual temperature K_(d) are determined, based on thefabrication of the oscillator, the above equations (17) and (18) areused to trim the one or both resistors R1, R2 to effect the appropriatecompensation.

The foregoing merely illustrates the principles of the invention. Itwill thus be appreciated that those skilled in the art will be able todevise various arrangements which, although not explicitly described orshown herein, embody the principles of the invention and are thus withinthe spirit and scope of the following claims.

1. An oscillator comprising: a first resistor (R1), a second resistor(R2), and a capacitor, wherein an oscillation frequency of theoscillator is dependent upon a difference between a first resistancevalue of the first resistor (R1) and a second resistance value of thesecond resistor (R2), the first resistance value being larger than thesecond resistance value, the first resistor (R1) exhibits a first rateof change with temperature, and the second resistor (R2) exhibits asecond rate of change with temperature that is larger than the firstrate of change, thereby allowing temperature-induced changes to thefirst resistance value to be offset by changes to the second resistancevalue, and thereby reducing variations in the oscillation frequency withtemperature.
 2. An oscillator as claimed in claim 1, comprising: a firststage, operably coupled to the first resistor (R1), that is configuredto provide a first voltage level, based on the first resistance value, asecond stage, operably coupled to the second resistor (R2), that isconfigured to provide a second voltage level, based on the secondresistance value, and a switching stage, operably coupled to the firststage, the second stage, and the capacitor, and is configured to:decrease a voltage on the capacitor when the voltage increases to thefirst voltage level, increase the voltage on the capacitor when thevoltage decreases to the second voltage level.
 3. The oscillator ofclaim 2, wherein the first resistor (R1) substantially controls currentflows through the first stage, the second stage, and the capacitor. 4.The oscillator of claim 3, wherein the current flows through the firststage, the second stage, and the capacitor are substantially equal inmagnitude.
 5. The oscillator of claim 4, wherein the second resistancevalue is selected based on the first resistance value, the first rate ofchange, and the second rate of change.
 6. The oscillator of claim 5,wherein the second resistance value is selected based also on a delayassociated with a feedback loop of the oscillator.
 7. The oscillator ofclaim 5, wherein a value of the second resistance value at a basetemperature includes a factor of R.sub.d*(K1/(K2−K1)), and a value ofthe first resistance value at the base temperature is substantiallyequal to R.sub.d plus the value of the second resistance value at thebase temperature, where R.sub.d corresponds to the difference betweenthe first resistance value and the second resistance value at a basetemperature, K1 is the first rate of change, and K2 is the second rateof change.
 8. The oscillator of claim 7, wherein the value of the secondresistance value at the base temperature further includes a secondfactor of (D/C)*((Kd−K1)/(K2−K1)), where D is a delay associated with afeedback loop of the oscillator at the base temperature, C is acapacitance value of the capacitor, and Kd is a rate of change of thedelay with temperature.
 9. The oscillator of claim 1, wherein the firstresistor (R1) is formed as a Ppoly resistor of a CMOS device, and thesecond resistor (R2) is formed as an Nwell resistor of the CMOS device.10. An oscillator comprising: a first stage that includes: adiode-configured Pchannel device operably coupled to a first voltagesource, a diode-configured Nchannel device operably coupled to a secondvoltage source, and a first resistor (R1) operably coupled in seriesbetween the diode-configured P-channel and Nchannel devices, a firstvoltage level being provided at a first node that couples the firstresistor (R1) to the diode-configured Pchannel device, a second stagethat includes a Pchannel device operably coupled to the first voltagesource and having a gate that is common to the first node, adiode-connected Nchannel device operably coupled to the second voltagesource, and a second resistor (R2) operably coupled in series betweenthe Pchannel device and the diode-configured Nchannel device of thesecond stage, a second voltage level being provided at a second nodethat couples the second resistor (R2) to the P-channel device; aswitching stage that is configured to control a voltage on a capacitorsuch that: the voltage is decreased when the voltage increases to thefirst voltage level, and the voltage is increased when the voltagedecreases to the second voltage level.
 11. The oscillator of claim 10,wherein the first resistor (R1) has a first temperature coefficient, andthe second resistor (R2) has a second temperature coefficient that issubstantially larger than the first temperature coefficient.
 12. Theoscillator of claim 11, wherein a reference voltage is provided at areference node that couples the first resistor (R1) to thediode-configured Nchannel device of the first stage, and the switchingstage includes a Pchannel device operably coupled to the first voltagesource and having a gate that is common to the first node, an Nchanneldevice operably coupled to the second voltage source, and having a gatethat is common to the reference node, wherein the switching stage isconfigured to couple the capacitor to the P-channel device of theswitching stage to increase the voltage on the capacitor, and couple thecapacitor to the Nchannel device of the switching stage to decrease thevoltage on the capacitor.
 13. The oscillator of claim 12, wherein theswitching stage includes: a first comparator that is configured tocompare the voltage on the capacitor to the first voltage level, asecond comparator that is configured to compare the voltage on thecapacitor to the second voltage level, and a bistable device that isconfigured to control the coupling of the capacitor to the Pchanneldevice and Nchannel device of the switching stage, based on an output ofthe first comparator and an output of the second comparator.
 14. Theoscillator of claim 10, wherein a reference voltage is provided at areference node that couples the first resistor (R1) to thediode-configured Nchannel device of the first stage, and the switchingstage includes a Pchannel device operably coupled to the first voltagesource and having a gate that is common to the first node, an Nchanneldevice operably coupled to the second voltage source, and having a gatethat is common to the reference node, wherein the switching stage isconfigured to couple the capacitor to the P-channel device of theswitching stage to increase the voltage on the capacitor, and couple thecapacitor to the Nchannel device of the switching stage to decrease thevoltage on the capacitor.
 15. The oscillator of claim 14, wherein theswitching stage includes: a first comparator that is configured tocompare the voltage on the capacitor to the first voltage level, asecond comparator that is configured to compare the voltage on thecapacitor to the second voltage level, and a bistable device that isconfigured to control the coupling of the capacitor to the Pchanneldevice and Nchannel device of the switching stage, based on an output ofthe first comparator and an output of the second comparator.
 16. Theoscillator of claim 10, wherein the switching stage includes: a firstcomparator that is configured to compare the voltage on the capacitor tothe first voltage level, a second comparator that is configured tocompare the voltage on the capacitor to the second voltage level, and abistable device that is configured to control a direction of currentapplied to the capacitor to increase or decrease the voltage on thecapacitor, bused on an output of the first comparator and an output ofthe second comparator.
 17. The oscillator of claim 10, wherein the firstresistor (R1) is formed as a Ppoly resistor, and the second resistor(R2) is formed as an Nwell resistor.
 18. The oscillator of claim 1,further including a comparator circuit to compare a voltage across thefirst resistor with a voltage across the capacitor and to compare avoltage across the second resistor with the voltage across the capacitorto reduce variation in the oscillation frequency with temperature.